(1) Field of the Invention
The present invention relates to a wiring board for mounting a semiconductor element thereon, and a method for manufacturing the same.
(2) Description of the Related Art
Conventionally, there have been known wiring boards for mounting, thereon, semiconductor elements having electrode terminals placed peripherally on the outer peripheral portions of their lower surfaces, through flip-chip connections. FIGS. 8A, 8B and 9 illustrate main portions of such a wiring board. As illustrated in FIGS. 8A, 8B and 9, the wiring board includes a solder resist layer 23 and a plurality of strip-shaped wiring conductors 26 for connecting a semiconductor element thereto, on an insulating layer 21. The strip-shaped wiring conductors 26 have respective thicknesses of about 10 to 20 micrometers and respective widths of about 10 to 20 micrometers. The strip-shaped wiring conductors 26 adjacent to each other are arranged at intervals of about 10 to 30 micrometers. Each strip-shaped wiring conductor 26 is partially provided with a semiconductor element connection pad 27. The respective semiconductor element connection pads 27 are placed in a zigzag manner, in order to prevent the strip-shaped wiring conductors 26 adjacent to each other from being arranged laterally. The solder resist layer 23 has openings 29 for individually exposing the semiconductor element connection pads 27. The solder resist layer 23 covers the remaining portions of the strip-shaped wiring conductors 26 which are other than the portions of the semiconductor element connection pads 27. Further, each of the openings 29 has opening edges 29a between the corresponding semiconductor element connection pad 27 and the strip-shaped wiring conductors 26 adjacent thereto.
Electrode terminals T of the semiconductor element S are brought into contact with the semiconductor element connection pads 27 and, further, both of them are bonded to each other through a conductive bonding material such as a solder, for example. Thus, the electrode terminals T of the semiconductor element S are electrically connected to the strip-shaped wiring conductors 26.
After the electrode terminals T of the semiconductor element S have been bonded to the semiconductor element connection pads 27, the gap between the lower surface of the semiconductor element S and the upper surface of the solder resist layer 23 is filled with a sealing resin, which is called an under filling, in order to protect the semiconductor element S.
As a method for forming the solder resist layer 23 in such a wiring board, there has been known a method as disclosed in Japanese Unexamined Patent Application Publication No. 8-139438.
At first, the strip-shaped wiring conductors 26 are formed on the upper surface of the insulating layer 21, as illustrated in FIG. 10A. Next, as illustrated in FIG. 10B, a photosensitive resin film 23P for the solder resist layer 23 is placed on the strip-shaped wiring conductors 26.
Next, as illustrated in FIG. 10C, hot pressing is performed on the photosensitive resin film 23P, in the direction of arrows, with a flat pressing plate, which is not illustrated, so that the photosensitive resin film 23P is softened and is partially pushed into the intervals between the strip-shaped wiring conductors 26, 26 adjacent to each other. At this time, the upper surface of the photosensitive resin film 23P which has been subjected to the hot pressing is maintained at a flattened state.
Next, as illustrated in FIG. 10D, a light-exposure mask M having a light-shield pattern is placed on the photosensitive resin film 23P, at the portions corresponding to the openings 29. Subsequently, an UV ray as exposure light is directed to the photosensitive resin film 23P from above the light-exposure mask M, in the direction of arrows, for performing light exposure thereon.
At last, as illustrated in FIG. 10E, the portions of the photosensitive resin film 23P which have not been subjected to the light exposure are removed, through development. Subsequently, the photosensitive resin film 23P which has been left is thermally cured, thereby forming the solder resist layer 23.
On the other hand, in the wiring board including the solder resist layer 23 having the openings 29 for individually exposing the semiconductor element connection pads 27, if the solder resist layer 23 on the strip-shaped wiring conductors 26 has a larger thickness, this makes it harder to connect the semiconductor element connection pads 27 to the electrode terminals T of the semiconductor element S. Further, the gap between the lower surface of the semiconductor element S and the upper surface of the solder resist layer 23 is made smaller, which makes it harder to preferably fill this gap with the under filling. Therefore, in this wiring board, the solder resist layer 23 on the strip-shaped wiring conductors 26 is formed to have a smaller thickness, namely a thickness of about 3 to 10 micrometers.
However, as illustrated in FIG. 11, the solder resist layer 23 contains an insulating filler F with a diameter of about 1 to 10 micrometers which is made of a silicon oxide powder, for example. If this insulating filler F contains particles with diameters larger than the thickness of the solder resist layer 23 on the strip-shaped wiring conductors 26, external water and the like may reach the strip-shaped wiring conductors 26 through the contact interfaces between the insulating filler F and the resin in the solder resist layer 23. This has resulted in corrosions and discolorations in the strip-shaped wiring conductors 26, in some cases. Such corrosions and discolorations have caused degradation of electric connection reliability of the strip-shaped wiring conductors 26.